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Latest Articles on Electronic Design Automation (EDA)


Forum Post: RE: How to check the violation type differential pad parasitic...

Thank you so much, David. I appreciate it, it's good to work on 17.4 but not on 17.2 cause's function " axlDBCreateBoundingShape " is not supported. Could you help modify this code to find the...

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Forum Post: RE: trapezoidal ringing with spectreX

Hi Shawn, Thanks for your feedback, it works. Can you give more info why gear2only is proposed here, and why not other integration methods? Before SpectreX, we generally use trapgear2 to avoid...

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Forum Post: datapoints/memory array

HI everyone I have two questions here first: how to convert a set of datapoints (stored in a text file) each having ten bits (b0.....b9) to be the input trigger of ten pulses sources (V0..V9) with...

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Forum Post: RE: Cadence Vrituoso

hello,I also met this problem,but when I type in echo $PATH, it shows echo $PATH...

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Forum Post: RE: ARUGUMENTS error

Hello Max, If path_enter is not a global variable..then how can we do this? i try this way but it didn;t work- path_enter=hiCreateStringField( ?name 'path_enter ?defValue "Hello 321" )...

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Forum Post: Dc operating point info with spectre -X LX

hello Tool Version : ICADVM20.1 -64b I am running a very basic Dc operating point info simulation on my circuit.( top level ; resonably big) Iam using spectre-X with preset LX option along with APS-DC...

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JEDEC UFS 4.0 for Highest Flash Performance

Speed increase requirements keep on flowing by in all the domains surrounding us. The same applies to memory storage too. Earlier mobile devices used eMMC based flash storage, which was a significantly...

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Training Insights - Achieving a Holistic Power-Aware Design by Getting...

This blog post mentions the Cadence Low Power Solution, a design-to-signoff methodology, that helps you implement several low-power techniques to reduce both dynamic and leakage power during synthesis...

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Training Insights - Achieving a Holistic Power-Aware Design by Getting...

This blog post mentions the Cadence Low Power Solution, a design-to-signoff methodology, that helps you implement several low-power techniques to reduce both dynamic and leakage power during synthesis...

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Knowledge Booster Training Bytes - Virtuoso Visualization and Analysis XL

This blog describes how to efficiently use Virtuoso Visualization and Analysis XL.(read more)

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Popular Articles on Electronic Design Automation (EDA)


Re: Using Calibre to generate Verilog netlist and SPEF file PrimeTime

Thanks,Still some questions: 1. Should that the SPEF extraction for a standard cell based digital circuit be excuted using gate-level  extraction?2. Can the STA result based on SPEF from Calibre be...

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layout filemerge from command line

The following is an example of a script that will merge 2 layout files using the DESIGNrev Tcl batch commands that accept user input. The usage is as follows:$MGC_HOME/bin/calibredrv...

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Forum Post: Ocean script running on Centos6 but not on Centos7

Hi. I have an ocean script that runs on C6 fine, but hangs on C7. It's invoked from a python environment, and I'm trying which of the following goes wrong: 1. Python script 2. Ocean simulation files 3....

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Virtuoso ICADVM20.1 ISR26 and IC6.1.8 ISR26 Now Available

The ICADVM20.1 ISR26 and IC6.1.8 ISR26 production releases are now available for download.(read more)

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Technology Overview:How to Generate XOR rules for GDS and Oasis input databases

How to generate Calibre XOR Rules for Oasis and GDS database Compare Overview: Generating Calibre XOR rules for input databases when the input layers are not known can be time consuming. This video...

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Error while plotting Extracted simulation results

HelloWhile plottinhg results from transient simulation from extracted view, I am getting following error. Please advise a solutionERROR (WIA-1006): Unable to plot expression <VT("/I0/26274:gnd_ana"...

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Forum Post: Change IR-DROP constraint (70% of VDD) in Tempus

Hello, I'm usingTempus (v. 15.14) to perform time analysis using IR-DROP (from Voltus). I read the IR-DROP file (.iv) using: "read_instance_voltage -min -ir_drop myfile.iv" (OK) However, when I perform...

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Importing CSV connectivity into VeSys 2.0 Harness

DescriptionHarness Manufacturers often develop connectivity in spreadsheet form, or they receive a CSV file containing the connectivity from the OEM (this is usually in the form of a "from-to-list")....

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importing image into PADS layout

I am new here and would like to share new method.Necessary tool is just a FontCreator ( it costs $69 now)By using this FontCreator, make a true type font and save and install Windows.Below is the font...

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Tip of the Week: ModelSim PE Student Edition has new url

There is a new url for the ModelSim PE Student Edition:http://www.mentor.com/company/higher_ed/modelsim-student-edition

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Top-Rated Articles on Electronic Design Automation (EDA)


Forum Post: RE: CIS database -> Error(ORCIS-6245): Database Operation Failed

Thanks a lot for quick answer! It might be that I have been a bit too creative here; I have renamed databases, changed the Views in CIP-E etc. so most likely things are out of sync. We currently have a...

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