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Popular Articles on Electronic Design Automation (EDA)


Forum Post: ERROR (ADE-3023)

Hello to everybody, Recently I have begun working with Cadence Virtuoso 6.17. When I want to perform an ADE-L simulation I obtain the following error in the CIW: ERROR (ADE-3023): Cannot run...

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xDX Designer - Shortcut Keys to Quickly Open/Close Schematic Tabs

In xDX Designer, there are tabs across the top, one for each schematic sheet.  Are there shortcut keys or a menu option to quickly close all tabs and quickly open all tabs?

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How much DRC warnings have your average design?

im interested how clear are you designing.Sometimes its easier to accept DRCs then change CES/settings.

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Tip of the Week: ModelSim PE Student Edition has new url

There is a new url for the ModelSim PE Student Edition:http://www.mentor.com/company/higher_ed/modelsim-student-edition

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Variant Manager excel report from script

     I've recently began scripting for dxdesigner with vbs script, both of which are relatively new to me. I need to write a script that generates an excel report from the variant manager.This is not...

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LVS mismatch on calibre: sub! ; drain and source sharing issue?

Hello there,I have made DFF layout in ON semi 0.5um (previous AMI 0.5um) process. The DRC is clean. Now, I am having an issue with LVS in Calibre. (For LVS, I have created netlist from Cadence and...

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xDX Designer - Highlighting All Instances of a Net By Selecting Net in Navigator

In xDX Designer, is there a way for me to highlight a net in the Navigator and get it to highlight that net on all schematic sheets that it is on?

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DxDesigner - All Instances of Net Names - Updating & Highlighting

In DxDesigner, if I have the same net on two different pages (that is, I am connecting one component on one page to another component on another page):How can I change the net name on one page and have...

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Flattening gds is taking hours

Hi all, I have been using following tcl script for flattening data and deleting unused cell referencesBut it is taking more then 10 hours to complete the process for some reason.The gds I am using is...

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CodeBench license not found after reboot

I'm running Ubuntu 14. I've installed the CodeBench Lite ARM Linux IDE and during installation it accepts my valid license file. I can run and compile code--no problems. Once I reboot, however, I...

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ASIC Verification – Breaking The Three Laws

Breaking the Three Laws is dedicated to discussing technically challenging ASIC prototyping problems and sharing solutions.

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Tom Hausherr's Blog » library tools

Electronic Component Packages and PCB Libraries

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